1. Field of the Invention
The present invention relates to an error-correcting communication method and a communication device using the communication method.
2. Background Art
FIG. 1 is a block diagram showing a part of the configuration of a conventional base station of the CDMA (Code Division Multiple Access) system. In FIG. 1, reference numeral 1 denotes a receiving antenna, 2 a radio unit, 3 a digital signal processing unit, 4 a network, 5 a demodulating unit in the digital signal processing unit 3, and 6 an error correcting unit in the digital signal processing unit 3.
Next, the operation of the prior art example will be described below.
The receiving antenna 1 receives a radio signal from a mobile communication terminal (not shown), and supplies it to the radio unit 2. The radio unit 2 correlates the radio signal with an independent spreading code in each communication channel (i.e., de-spreads the radio signal) to extract a primary modulated signal, which is applied to the digital signal processing unit 3. The demodulating unit 5 of the digital signal processing unit 3 demodulated the primary modulated signal, and provides the demodulated signal to the error correcting unit 6. The error correcting unit 6 corrects an error caused in the transmission line.
To make the error correction, the transmitting side sends out information after imparting redundancy to the information under certain rules and subjecting it to various kinds of coding. For example, according to the 3GPP (3rd Generation Partnership Project) specifications, in an up-link from the mobile communication terminal to the base station, voice data of main information and control data for control use are each added with CRC (Cyclic Redundancy Check) data for each frame, and they are subjected to turbo coding and convolution coding. This is followed by first interleaving that makes a frame by frame data replacement. And, rate matching such as repeat process and puncture process is performed for frame adjustment that ensures the bit rate over the entire length of the up-link. Moreover, second interleaving is performed to make an intra-frame bit replacement.
Accordingly, the receiving side is required to perform in the error correcting unit 6 in FIG. 1 error correction process that is inverse to the process performed at the transmitting side. FIG. 2 depicts a part of the error correction process that is conducted in the error correcting unit 6. That is, the demodulated signal provided from the demodulating unit 6 is subjected to second de-interleaving (step ST1), which is followed by rate de-matching (step ST2), then first de-interleaving (step ST3), and turbo decoding and convolution decoding (step ST4), then it is output.
FIG. 3 is a circuit diagram showing a part of the conventional error correcting unit. Reference numeral 11 denotes a second de-interleaving circuit, and 12 a rate de-matching circuit. In the second de-interleaving circuit 11, reference numeral 13 denotes an input DP (Dual Port) RAM, 14 an address counter circuit for second de-interleave use, and 15 an output DPRAM. In the rate de-matching circuit 12, reference numeral 16 denotes an input DP RAM, 17 a rate de-matching operation circuit, and 18 an output DPRAM. Further, though it is not shown in the drawing, there is connected to the output side of the rate de-matching circuit 12 a first de-interleaving circuit that has about the same configuration as that of the second de-interleaving circuit 11 and comprises an input DPRAM, an output DPRAM and an address counter circuit for first de-interleave use.
Next, the operation of conventional error correcting unit will be described below.
Demodulated signal data of a several frames, for instance, two frames, is written in the input DPRAM 13, from which the data is read out in the form in which it is rearranged or de-interleaved according to address data provided from the address counter circuit 14, and thus the read-out data is written in the output DPRAM 15. The de-interleaved data read out from the output DPRAM 15 is written in the input DPRAM 16.
Next, the data read out from the input DPRAM 16 is fed to the rate de-matching circuit 17, wherein it is subjected to rate de-matching. That is, the data is subjected to process inverse to the repeat or puncture process. And the data is written in the output DPRAM 18. Further, the data read out therefrom is subjected to first de-interleaving in the first de-interleaving circuit which is not shown in the drawing.
With the conventional communication scheme that performs the de-interleaving and rate de-matching and the communication device using the communication scheme, however, much time is required for writing and reading of data from and to DPRAM in the de-interleaving and rate de-matching, this gives rise to a problem of extended processing time throughout the communication system. Moreover, the use of a large number of memories in the device inevitably raises a cost of the device and constitutes an obstacle to its miniaturization.
The present invention is intended to solve the above mentioned problems, and it has an object to provide a communication method that permits reduction of the processing time of the communication system.
Another object of the present invention is to provide a communication device that permits reduction of an amount of memories used, to cut down the cost of the device and to do its miniaturization.